Summary:

What if you could slash the power, area, and performance overhead of your safety-critical silicon—without compromising ASIL-B compliance? 
 
Join us for an exclusive deep dive into Imagination Technologies’ latest innovations in Distributed Functional Safety. In this session, we’ll unveil how our patent-pending Distributed Safety Mechanisms (DSMs) challenge the status quo of traditional Dual-Core Lock-Step (DCLS) and run-twice GPU approaches—offering up to 2x efficiency gains with smarter, localized fault detection. 
 
What you’ll learn: 
  •  Why DSMs outperform conventional redundancy in detecting logic faults 
  •  How Safety Pairs and Idle Cycle Stealing revolutionize fault coverage with minimal runtime impact 
  •  Real-world comparisons showing significant gains in performance-per-mm² and performance-per-watt  
 
Whether you’re designing next-gen automotive GPUs or scaling high-efficiency edge AI devices, this is your chance to learn how distributed safety can unlock new design freedoms. 
 
Reserve your seat now—because safe doesn’t have to mean slow. 

When: 29 April 2025, 4PM UK time

Speaker: Andrew Johnston, Senior Functional Safety Manager